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ADL5317
 
Rev. 0 | Page 5 of 16
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
PIN 1
INDICATOR
1
FALT
2
VSET
3
VPLV
4
VPHV
11 IPDM
12 NC
10 NC
9   GARD
TOP VIEW
(Not to Scale)
ADL5317
NC = NO CONNECT
 
Figure 2. Pin Configuration
Table 3. Pin Function Descriptions
Pin No.     Mnemonic     Description
1
FALT
Open Collector (Active Low) Logic Output. Indicates an overcurrent or overtemperature condition.
2
VSET
APD Bias Voltage Setting Input. Short to VPLV for supply tracking mode.
3
VPLV
Low Voltage Supply, 4 V to 6 V.
4, 5
VPHV
High Voltage Supply, 10 V to 80 V.
6
VCLH
Can be shorted to VPHV for extended linear operating range. No connect for supply tracking mode.
7, 9
GARD
Guard pin tracks VAPD pin and filters setpoint buffer noise (with External Capacitor CGRD to COMM). Optional
shielding of VAPD trace. Capacitive load only.
8
VAPD
APD Bias Voltage Output and Current Input. Sources current only.
10, 12
NC
Optional shielding of IPDM trace. No connection to die.
11
IPDM
Photodiode Monitor Current Output. Sources current only. Current at this node is equal to IAPD/5.
13 to 16    COMM
Analog Ground.
 
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